Machine Language Assignemnt

Read the slide and book, which is you have to log in online bryatwave. And due to the questions

Save Time On Research and Writing
Hire a Pro to Write You a 100% Plagiarism-Free Paper.
Get My Paper

Assembly Language for x86 Processors
Eighth Edition
Chapter 6
Conditional Processing
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-1
Chapter Overview
• Boolean and Comparison Instructions
• Conditional Jumps
• Conditional Loop Instructions
• Conditional Structures
• Application: Finite-State Machines
• Conditional Control Flow Directives
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-2
Boolean and Comparison Instructions
• CPU Status Flags
• AND Instruction
• OR Instruction
• XOR Instruction
• NOT Instruction
• Applications
• TEST Instruction
• CMP Instruction
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-3
Status Flags – Review (1 of 2)
• The Zero flag is set when the result of an operation equals
zero.
• The Carry flag is set when an instruction generates a result
that is too large (or too small) for the destination operand.
• The Sign flag is set if the destination operand is negative,
and it is clear if the destination operand is positive.
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-4
Status Flags – Review (2 of 2)
• The Overflow flag is set when an instruction generates an
invalid signed result (bit 7 carry is XORed with bit 6 Carry).
• The Parity flag is set when an instruction generates an
even number of 1 bits in the low byte of the destination
operand.
• The Auxiliary Carry flag is set when an operation produces
a carry out from bit 3 to bit 4
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-5
AND Instruction
• Performs a Boolean AND operation between each pair of
matching bits in two operands
• Syntax:
AND destination, source
(same operand types as MOV)
AND
00111011
AND 0 0 0 0 1 1 1 1
cleared
00001011
unchanged
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-6
OR Instruction
• Performs a Boolean OR operation between each pair of
matching bits in two operands
• Syntax:
OR destination, source
OR
00111011
OR 0 0 0 0 1 1 1 1
unchanged
00111111
set
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-7
XOR Instruction
• Performs a Boolean exclusive-OR operation between each
pair of matching bits in two operands
• Syntax:
XOR
XOR destination, source
00111011
XOR 0 0 0 0 1 1 1 1
unchanged
00110100
inverted
XOR is a useful way to toggle (invert) the bits in an operand.
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-8
NOT Instruction
• Performs a Boolean NOT operation on a single destination
operand
• Syntax:
NOT destination
NOT
NOT
00111011
11000100
inverted
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6-9
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Binary Adder-Subtractor
– The most basic form of arithmetic is adding two
binary digits
 Four possible operations
0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 10

( result is two digits )
( sum and carry)
10
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 10
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
– Half adder
 Combinational circuit that performs the addition of two bits
– Full adder
 Performs the addition of three bits (two significant and a
previous carry)
– Two half-adders can be used to implement a
full adder
11
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 11
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Half adder
• Requires two inputs (x , y) and two outputs (C , S)
• Inputs – augend and addend
• Outputs – Carry and Sum
• From the truth table
12
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 12
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• The gates, along with their truth tables are
shown below
13
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 13
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• The gates, along with their truth tables
14
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 14
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Back to half-adder – adding two bits
S = x’y +xy’
C = xy
not x and y OR x and not y
x and y
15
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 15
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Full adder
– A full adder forms the arithmetic sum of three bits.
 Has three inputs and two outputs
Truth table
Eight rows due to three variables
C is equal to one if two or three
Inputs are equal to 1
S is equal to 1 when one
or all three inputs are 1
16
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 16
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Full adder
– A full adder forms the arithmetic sum of three bits.
 Has three inputs and two outputs
17
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 17
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Full adder logic diagrams
18
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 18
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Full adders used for a four-bit adder
– the square (FA) replaces the circuitry
– Propagation: Inputs A 3 and B 3 are available when the input
signal is applied, but C 3 is not at it’s final value until C 2 is
available from the previous stage, and so on.
19
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 19
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• The mode input M, switches the logic from an adder to a subtractor
– When M = 0, the circuit is an adder
– When M = 1, the circuit is a subtractor
Detects overflow
20
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 20
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Digital Circuitry
• Decimal Adder
– Since four bits are required to code each decimal number and the
circuit must have an input and output carry, a decimal adder
requires a minimum of nine inputs and five outputs.
21
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 21
Irvine, Kip R. Assembly Language
for x86 Processors 7/e, 2015.
Bit-Mapped Sets
• Next
22
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 22
Bit-Mapped Sets
• Binary bits indicate set membership
• Efficient use of storage
• Also known as bit vectors
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 23
Bit-Mapped Set Operations
• Set Complement
mov eax,SetX
not eax
• Set Intersection
mov eax,setX
and eax,setY
• Set Union
mov eax,setX
or eax,setY
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 24
Applications (1 of 5)
• Task: Convert the character in AL to upper case.
• Solution: Use the AND instruction to clear bit 5.
mov al,’a’
and al,11011111b
; AL = 01100001b
; AL = 01000001b
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 25
Applications (2 of 5)
• Task: Convert a binary decimal byte into its equivalent
ASCII decimal digit.
• Solution: Use the OR instruction to set bits 4 and 5.
mov al,6
or al,00110000b
; AL = 00000110b
; AL = 00110110b
The ASCII digit ‘6’ = 00110110b
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 26
Applications (3 of 5)
• Task: Turn on the keyboard CapsLock key
• Solution: Use the OR instruction to set bit 6 in the
keyboard flag byte at 0040:0017h in the BIOS data area.
mov ax,40h
mov ds,ax
mov bx,17h
or BYTE PTR [bx],01000000b
; BIOS segment
; keyboard flag byte
; CapsLock on
This code only runs in Real-address mode, and it does not work under
Windows NT, 2000, or XP.
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 27
Applications (4 of 5)
• Task: Jump to a label if an integer is even.
• Solution: AND the lowest bit with a 1. If the result is Zero,
the number was even.
mov ax,wordVal
and ax,1
jz EvenValue
; low bit set?
; jump if Zero flag set
JZ (jump if Zero) is covered in Section 6.3.
Your turn: Write code that jumps to a label if an
integer is negative.
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 28
TEST Instruction (1 of 2)
• Performs a nondestructive AND operation between each
pair of matching bits in two operands
• No operands are modified, but the Zero flag is affected.
• Example: jump to a label if either bit 0 or bit 1 in AL is set.
test al,00000011b
jnz ValueFound
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 30
TEST Instruction (2 of 2)
• Example: jump to a label if neither bit 0 nor bit 1 in
AL is set.
test al,00000011b
jz ValueNotFound
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 31
CMP Instruction (1 of 3)
• Compares the destination operand to the source operand
– Nondestructive subtraction of source from destination
(destination operand is not changed)
• Syntax: CMP destination, source
• CMP – compare instruction performs an implied subtraction of a
source operand from a destination operand. It changes the OF, Sign,
Zero, CF, Aux Carry, and Parity as if subtraction actually occurred.
CMP Results
ZF
CF
Destination < source 0 1 Destination > source 0
0
Destination = source 1
0
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 32
CMP Instruction (2 of 3)
• Example: destination == source
mov al,5
cmp al,5
; Zero flag set
• Example: destination < source mov al,4 cmp al,5 ; Carry flag set • Example: destination > source
mov al,6
cmp al,5
; ZF = 0, CF = 0
(both the Zero and Carry flags are clear)
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 33
CMP Instruction (3 of 3)
The comparisons shown here are performed with signed
integers.
• Example: destination > source
mov al,5
cmp al,-2
; Sign flag == Overflow flag
• Example: destination < source mov al,-1 cmp al,5 ; Sign flag != Overflow flag Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 34 Boolean Instructions in 64-Bit Mode • 64-bit boolean instructions, for the most part, work the same as 32-bit instructions • If the source operand is a constant whose size is less than 32 bits and the destination is the lower part of a 64-bit register or memory operand, all bits in the destination operand are affected • When the source is a 32-bit constant or register, only the lower 32 bits of the destination operand are affected Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 35 What's Next (1 of 5) • Boolean and Comparison Instructions • Conditional Jumps • Conditional Loop Instructions • Conditional Structures • Application: Finite-State Machines • Conditional Control Flow Directives Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 36 Conditional Jumps • Jumps Based On . . . – Specific flags – Equality – Unsigned comparisons – Signed Comparisons • Applications • Encrypting a String • Bit Test (BT) Instruction Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 37 Jcond Instruction • A conditional jump instruction branches to a label when specific register or flag conditions are met • Specific jumps: JB, JC - jump to a label if the Carry flag is set JE, JZ - jump to a label if the Zero flag is set JS - jump to a label if the Sign flag is set JNE, JNZ - jump to a label if the Zero flag is clear JECXZ - jump to a label if ECX = 0 Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 38 Jcond Ranges • Prior to the 386: – jump must be within –128 to +127 bytes from current location counter • x86 processors: – 32-bit offset permits jump anywhere in memory Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 39 Jumps Based on Specific Flags Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 40 Jumps Based on Equality Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 41 Jumps Based on Unsigned Comparisons Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 42 Jumps Based on Signed Comparisons Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 43 Applications (1 of 4) • Task: Jump to a label if unsigned EAX is greater than EBX • Solution: Use CMP, followed by JA cmp eax,ebx ja Larger • Task: Jump to a label if signed EAX is greater than EBX • Solution: Use CMP, followed by JG cmp eax,ebx jg Greater Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 44 Applications (2 of 4) • Jump to label L1 if unsigned EAX is less than or equal to Val1 cmp eax,Val1 jbe L1 ; below or equal • Jump to label L1 if signed EAX is less than or equal to Val1 cmp eax,Val1 jle L1 Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 45 Applications (3 of 4) • Compare unsigned AX to BX, and copy the larger of the two into a variable named Large mov Large,bx cmp ax,bx jna Next mov Large,ax Next: • Compare signed AX to BX, and copy the smaller of the two into a variable named Small mov Small,ax cmp bx,ax jnl Next mov Small,bx Next: Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 46 Applications (4 of 4) • Jump to label L1 if the memory word pointed to by ESI equals Zero cmp WORD PTR [esi],0 je L1 • Jump to label L2 if the doubleword in memory pointed to by EDI is even test DWORD PTR [edi],1 jz L2 Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 47 Applications • Task: Jump to label L1 if bits 0, 1, and 3 in AL are all set. • Solution: Clear all bits except bits 0, 1,and 3. Then compare the result with 00001011 binary. and al,00001011b cmp al,00001011b je L1 ; clear unwanted bits ; check remaining bits ; all set? jump to L1 Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 48 Encrypting a String The following loop uses the XOR instruction to transform every character in a string into a new value. KEY = 239 BUFMAX = 128 .data buffer BYTE BUFMAX+1 DUP(0) bufSize DWORD BUFMAX .code mov ecx,bufSize mov esi,0 L1: xor buffer[esi],KEY inc esi loop L1 ; can be any byte value ; loop counter ; index 0 in buffer ; translate a byte ; point to next byte Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 50 String Encryption Program • Tasks: – Input a message (string) from the user – Encrypt the message – Display the encrypted message – Decrypt the message – Display the decrypted message View the Encrypt.asm program's source code. Sample output: Enter the plain text: Attack at dawn. Cipher text: «¢¢Äîä-Ä¢-ïÄÿü-Gs Decrypted: Attack at dawn. Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 51 BT (Bit Test) Instruction • Copies bit n from an operand into the Carry flag • Syntax: BT bitBase, n – bitBase may be r/m16 or r/m32 – n may be r16, r32, or imm8 • Example: jump to label L1 if bit 9 is set in the AX register: bt AX,9 jc L1 ; CF = bit 9 ; jump if Carry Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 52 What's Next (2 of 5) • Boolean and Comparison Instructions • Conditional Jumps • Conditional Loop Instructions • Conditional Structures • Application: Finite-State Machines • Conditional Control Flow Directives Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 53 Conditional Loop Instructions • LOOPZ and LOOPE • LOOPNZ and LOOPNE Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 54 LOOPZ and LOOPE • Syntax: – LOOPE destination – LOOPZ destination • Logic: – ECX  ECX – 1 – if ECX > 0 and ZF=1, jump to destination
• Useful when scanning an array for the first element that
does not match a given value.
In 32-bit mode, ECX is the loop counter register. In 16-bit real-address
mode, CX is the counter, and in 64-bit mode, RCX is the counter.
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 55
LOOPNZ and LOOPNE
• LOOPNZ (LOOPNE) is a conditional loop instruction
• Syntax:
– LOOPNZ destination
– LOOPNE destination
• Logic:
– ECX  ECX – 1;
– if ECX > 0 and ZF=0, jump to destination
• Useful when scanning an array for the first element that
matches a given value.
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 56
LOOPNZ Example
The following code finds the first positive value in an array:
.data
array SWORD -3,-6,-1,-10,10,30,40,4
sentinel SWORD 0
.code
mov esi,OFFSET array
mov ecx,LENGTHOF array
next:
test WORD PTR [esi],8000h
pushfd
add esi,TYPE array
popfd
loopnz next
jnz quit
sub esi,TYPE array
quit:
; test sign bit
; push flags on stack
; pop flags from stack
; continue loop
; none found
; ESI points to value
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 57
Your Turn . . . (2 of 8)
Locate the first nonzero value in the array. If none is found,
let ESI point to the sentinel value:
.data
array SWORD 50 DUP(?)
sentinel SWORD 0FFFFh
.code
mov esi,OFFSET array
mov ecx,LENGTHOF array
L1: cmp WORD PTR [esi],0
; check for zero
(fill in your code here)
quit:
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 58
. . . (solution)
.data
array SWORD 50 DUP(?)
sentinel SWORD 0FFFFh
.code
mov esi,OFFSET array
mov ecx,LENGTHOF array
L1: cmp WORD PTR [esi],0
pushfd
add esi,TYPE array
popfd
loope L1
jz quit
sub esi,TYPE array
quit:
; check for zero
; push flags on stack
; pop flags from stack
; continue loop
; none found
; ESI points to value
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 59
What’s Next (3 of 5)
• Boolean and Comparison Instructions
• Conditional Jumps
• Conditional Loop Instructions
• Conditional Structures
• Application: Finite-State Machines
• Conditional Control Flow Directives
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 60
Conditional Structures
• Block-Structured IF Statements
• Compound Expressions with AND
• Compound Expressions with OR
• WHILE Loops
• Table-Driven Selection
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 61
Block-Structured IF Statements
Assembly language programmers can easily translate logical
statements written in C++/Java into assembly language. For
example:
if( op1 == op2 )
X = 1;
else
X = 2;
mov eax,op1
cmp eax,op2
jne L1
mov X,1
jmp L2
L1: mov X,2
L2:
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 62
Your Turn . . . (3 of 8)
Implement the following pseudocode in assembly language.
All values are unsigned:
if( ebx cl)
X = 1;
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 65
Compound Expression with AND (2 of 3)
if (al > bl) AND (bl > cl)
X = 1;
This is one possible implementation . . .
cmp al,bl
ja L1
jmp next
; first expression…
cmp bl,cl
ja L2
jmp next
; second expression…
L1:
L2:
mov X,1
next:
; both are true
; set X to 1
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 66
Compound Expression with AND (3 of 3)
if (al > bl) AND (bl > cl)
X = 1;
But the following implementation uses 29% less code by
reversing the first relational operator. We allow the program to
“fall through” to the second expression:
cmp al,bl
jbe next
cmp bl,cl
jbe next
mov X,1
next:
; first expression…
; quit if false
; second expression…
; quit if false
; both are true
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 67
Your Turn . . . (5 of 8)
Implement the following pseudocode in assembly
language. All values are unsigned:
if( ebx edx )
{
eax = 5;
edx = 6;
}
cmp ebx,ecx
ja next
cmp ecx,edx
jbe next
mov eax,5
mov edx,6
next:
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 68
Compound Expression with OR (1 of 2)
• When implementing the logical OR operator, consider that
HLLs use short-circuit evaluation
• In the following example, if the first expression is true, the
second expression is skipped:
if (al > bl) OR (bl > cl)
X = 1;
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 69
Compound Expression with OR (2 of 2)
if (al > bl) OR (bl > cl)
X = 1;
We can use “fall-through” logic to keep the code as short as
possible:
cmp al,bl
ja L1
cmp bl,cl
jbe next
L1: mov X,1
next:
; is AL > BL?
; yes
; no: is BL > CL?
; no: skip next statement
; set X to 1
Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved
6 – 70
WHILE Loops
A WHILE loop is really an IF statement followed by the body
of the loop, followed by an unconditional jump to the top of
the loop. Consider the following example:
while( eax < ebx) eax = eax + 1; This is a possible implementation: top: cmp eax,ebx jae next inc eax jmp top next: ; check loop condition ; false? exit loop ; body of loop ; repeat the loop Copyright © 2020, 2015, 2011 Pearson Education, Inc. All Rights Reserved 6 - 71 Your Turn . . . (6 of 8) Implement the following loop, using unsigned 32-bit integers: while( ebx

Still stressed from student homework?
Get quality assistance from academic writers!

Order your essay today and save 25% with the discount code LAVENDER