Experiment Electrical enginneering

Four questions on the PDF attached are at the end of the PDF conduct a lab report and include your results based on the questions being asked give schematics where it ask for it.

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ECE 115

Introduction to Electrical and Computer Engineering

Laboratory Experiment #12

  • Memory
  • Objective: In this experiment you will learn how computer memory works. The kind of memory
    that will be investigated is called RAM, random access memory. The basic building block of
    RAM is the flip-flop, (FF). You will learn how to design memory with the FF.

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    Memories Are Made of These

    Computer systems use memory generally for two purposes: to store data and to hold programs.
    The data may be predetermined and input to a program or may be generated by an executing
    program to be outputted or used later by the program. For these different kinds of data,
    different kinds of memory are used. RAM (random access memory) is the kind of memory to
    which data can be written and from which we can read data in any sequence. RAM keeps its
    data content as long as power is supplied to the RAM circuitry, and all data content is lost when
    power to the circuitry is turned off.

    ROM (read only memory) is the type of memory into which data and programs can be placed,
    and the content of this memory is retained even when power to the circuitry is turned off.
    However, once placed into ROM, this data can then no longer be changed. Virtually all
    computer systems have ROM memory to hold data and programs that execute when power is
    first applied to the computer. Also, all computer systems have RAM memory that contains
    copies of the programs that will be executed and the data that is the result of computing.

    The physical devices that are used to make RAM and ROM vary considerably. For one kind of
    memory, called DRAM (dynamic random access memory) the main storage element is a
    capacitor. When the capacitor is charged, we say it holds logic 1, and when the capacitor is
    uncharged, we say it holds logic 0. A major problem with such a storage device is that the
    charge tends to dissipate, and in a few milliseconds after writing data to this kind of memory
    the content of memory is lost. Charged capacitors will tend to discharge and uncharged
    capacitors will tend to charge. However, such a memory element can be manufactured in very
    high density. The problem of memory retention can be overcome, and therefore this type of
    memory is the main memory of most computer systems. RAM, also called static RAM (SRAM) is
    made of FFs, and data that has been written to this memory is retained indefinitely, as long as
    power is supplied to its circuitry.

    The logic circuitry of computer systems (digital systems) can generally be classified into to
    major groups: combinational (or combinatorial) circuits and sequential circuits. The output of a
    combinational circuit is a function solely of its inputs, like the logic circuit that performs the
    activity of a full adder. These circuits can be described by Boolean functions. On the other
    hand, the output of a sequential circuit is a function not only of the inputs but also of the
    current and past outputs. It is said that there is feedback from the outputs to the inputs.
    Sequential circuits have both combinational logic components and memory. Since the output
    of a combinational circuit depends solely upon the inputs, the implication is that combinational
    circuits have no memory.

    For a device to serve as memory, it must have three characteristics:

    • the device must have two stable states
    • there must be a way to read the state of the device
    • there must be a way to set (write) the state at least once.

    R-S Latch (Flip Flop)

    The R-S latch is one of the most basic RAM building blocks. With this basic circuit, which is also
    called a flip-flop (FF), memory registers, cache memory, and complex sequential circuits are
    constructed.

    Consider the circuit shown in Figure 11.1. The output of a NOR gate is true (logic 1 or high) only
    when both inputs are false (logic 0 or low). The output of each NOR gate is fed back to the input
    of the other NOR gate. This means that if the output of one NOR gate is true, then the output of
    the other NOR gate must be false.

    R

    Q

    S

    Q’

    Figure 11.1. RS latch using NOR gates.

    Suppose the S input is high, and the R input is low. Then, the output of the upper NOR gate,
    called Q, is forced to be high. Even if S is set low, Q will remain high, and the output of the
    other NOR gate, called not Q ( Q ‘ ), will remain low. The circuit will remain in this stable state
    indefinitely.

    Suppose the S input is low, and the R input is high. Then Q is forced to be low. Even if R is set
    low, Q will remain low, and Q ‘ will remain high. The circuit will remain in this stable state
    indefinitely. The circuit has two stable states.

    Notice that the Q and Q ‘ outputs are complements of each other. The S input stands for set
    the flip-flop (FF) to make Q = 1 ( Q ‘ = 0), and the R input stands for reset the FF to make Q = 0
    ( Q ‘ = 1). Once the FF is set, then setting it again will not change it, and once the FF is reset,
    then resetting it again will not change it. However, at any time we can set it, and it will retain
    the set state indefinitely, and we can reset it, and it will retain the reset state indefinitely.

    The activity of the R-S flip-flop (also called a latch) is described in Table 11.1.

    Table 11.1. Characteristic table of a NOR gate R-S latch

    R S FF Activity
    0 0 Q remains unchanged
    0 1 Q = 1
    1 0 Q = 0
    1 1 Input not used

    The output of the circuit is stable in either state when the inputs are low. The output will only
    change when complementary inputs are applied. Such a circuit is said to be bistable, because it
    has two stable output states.

    For convenience we use the symbol shown in Fig. 11.2 for an RS-FF.

    R

    QS

    Q’
    RS-FF

    Figure 11.2. Symbol for the FF in Fig. 11.1.

    Binary Cell

    A computer system may have millions of flip-flops for RAM memory, not all of which are read or
    written at the same time. We must be able to specify

    a) that we want to read from a flip flop
    b) that we want to write to a flip flop

    c) which FF of many is the memory we want to access (read or write)
    d) and when a read or write operation should happen.

    Therefore, we add steering logic to the basic FF given in Fig. 11.2. This is shown in Fig. 11.3. In
    the figure is shown a circuit called a binary cell. The small circles at AND gate inputs are called
    bubbles, and they perform the logic NOT function, like a NOT gate. The line over S (meaning
    SELECT) and W (meaning write) means that to perform the action this signal must be low. It is
    said that S is an active low control input and that R/W is an active low write control input and
    an active high read control input.

    R
    QS
    Q’
    RS-FF

    OUT

    S

    R / W

    IN

    Figure 11.3. A one-bit memory circuit called a binary cell.

    When we want to read the content of a binary cell (BC), the R/W input is set high and the S
    input is set low, and then the output OUT will give OUT = Q. To deselect the BC, set the S
    input back to high. Notice that when the S input is high, then the R and S inputs to the FF are
    both low, and the Q output cannot be altered. When we want to write a particular bit to the BC
    (FF), then we must first apply the bit (high or low) to the input, IN. Then, we set the R/W input
    low, signifying that we want to write to the BC. When the S input is taken low, then the Q
    output of the FF will become the same logic value as the input, IN, but the output, OUT will not
    respond. Again, to deselect the BC, set the S input back to high, which prevents further
    alteration of Q.

    This BC can be one of many binary cells in a computer system. Let us use Fig. 11.4 as a symbol
    for a BC.

    OUT
    S
    R / W

    IN

    BC

    Figure 11.4. Symbol for a binary cell.

    With a binary cell we can make a RAM memory register that can hold a byte of data or program
    code, as shown in Fig. 11.5.

    S
    R / W
    BC
    BC
    BC

    I 0

    I 1

    I 7

    O 0

    O 1

    O 7

    Figure 11.5. Eight binary cells connected in parallel to form an 8-bit register.

    In Fig. 11.5, the R/W and S inputs of all BCs are connected together to simultaneously read
    and write a byte (8 bits) of data from and to the 8 binary cells. A grouping of BCs is called a
    register. Here, we have an 8-bit register. This register is redrawn more conveniently in Fig.
    11.6. In the right drawing, the notation accounts for 8 lines with a single line.

    S
    R / W
    I 0
    I 1

    I7

    O0

    O1

    O7 R / W

    S

    8 8
    I7 I0 O7 O0

    8

    bi
    t r

    eg

    8

    bi
    t r
    eg

    Figure 11.6. Block notation for a register.

    Experiment

    1) Build the circuit shown in Fig. 11.1. Use switch and pull-up resistor circuits to manually apply
    the R and S inputs, and use NOT gate, LED and resistor circuits to show the outputs Q and Q’.
    Give the characteristic table for the circuit. What happens to Q when both inputs are set to
    logic 1 and then to logic 0? Try this several times. Are the results always the same?

    2) Build the BC of Fig. 11.4, which is detailed in Figs. 11.1 and 11.3. For every one of the eight
    possible combinations of the three inputs, IN, R/W , and S , give the resulting output OUT.
    Use switch and pull-up resistor circuits to manually apply the three inputs, and use a NOT gate,
    LED and resistor circuit to show the output, OUT. Provide a table showing your results.
    Describe what you must do to read the BC. Describe what you must do to write a bit into the
    BC, where you must write logic 0 and then logic 1 and check each write operation by reading
    the BC to find if each write operation worked.

    Demonstrate to your TA that your binary cell works as intended.

    3) Leaving the S input high, the IN input low and the R/W input high, turn power off and
    on. Then read (set the S input low) the BC, and give results. Do this three times. Are the
    results always the same?

    4) In your report, give a drawing of a 32-bit register by connecting four 8-bit registers in
    parallel. Denote the inputs to the four registers with:

    31 30 24 23 22 16 15 14 8 7 6 0I I I I I I I I I I I I   

    and similarly for the outputs.

    Parts List:

    1) quad NOR gate (1, 7402)
    2) quad AND gate (1, 7408)
    3) hex NOT gate (2, 7404)
    4) LED (2)
    5) Resistor (2, 330 Ohms)
    6) Resistor (3, 10K Ohms)
    7) 8 switch DIP (1)

      Memory

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