Everything on PDF

Everything on PDF

CSE/EEE 230 – Assignment 10
Important: This is an individual assignment. Please do not collaborate.
Make sure to follow the academic integrity policies. Using work done by someone else will be
considered a violation of the academic integrity and will result in a report to the Dean’s office.
Your work should not match with anything found online.
Copying any part of this assignment, and providing them to another person or posting them on
the Internet without a permission of the instructor will be a violation of its copyright.
http://www.asu.edu/copyright/
No late submissions will be accepted.
Show all the steps to receive full credit.
There are 2 questions. The score will be scaled down to a total of 3 points.
Make sure to segment your document for the 2 questions.
Read the instructions clearly and show all required steps/explanation for full credit.
Question 1: Cache Size (15 points)
(a) What is the total size of a direct-mapped cache containing 512 KiB of data with 16 word
blocks?
(b) What is the total size of a 4-way set associative cache containing 512 KiB of data with 16
word blocks?
(c) What is the total size of a fully associative cache containing 512 KiB of data with 16 word
blocks?
Question 2: AMAT (15 points)
(a) L1 Data and L1 Instruction Cache: Compute the AMAT based on the following
specifications.
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There is separate instruction and data cache.
Program contains 40 instructions out of which 8 instructions are load/store instructions.
Instruction Cache Miss rate is 7.5% and Data Cache Miss rate is 10%.
Processor CPI is 1.5.
Miss penalty is 80 clock cycles.
Clock Speed is 4 GHz.
(b) Multi-level Cache: Compute the AMAT based on the following specifications.
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There are two levels of caches – L1 and L2.
Program contains 40 instructions out of which 8 instructions are not available in L1 cache.
4 of the instructions can be accessed from L2 cache, while the remaining need to be
accessed from Main Memory.
Processor CPI is 1.5 and L2 access time is 5 clock cycles.
Miss penalty is 80 clock cycles.
Clock Speed is 4 GHz.
CSE/EEE 230 – Bonus 5
Important: This is an individual assignment. Please do not collaborate.
Make sure to follow the academic integrity policies. Using work done by someone else will be
considered a violation of the academic integrity and will result in a report to the Dean’s office.
Your work should not match with anything found online.
Copying any part of this assignment, and providing them to another person or posting them on
the Internet without a permission of the instructor will be a violation of its copyright.
http://www.asu.edu/copyright/
No late submissions will be accepted.
There is one question that will be graded for 10 points and scaled down to 1 point.
Read the given assumptions clearly and show all required steps/explanation for full credit.
Question: Virtual Memory (10 points) – Write the TLB entries and the words (data or memory
contents) corresponding to the following virtual addresses.
(a) 0x026DE40C
(c) 0x00ABCDEF
(b) 0x004804B4
(d) 0x10000000
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Assume that both virtual and physical addresses are 32-bits, size of a page is 4K Bytes.
Table 1: entries in a Page Table; Table 2: 2-way cache with 2-word blocks.
If data corresponding to an address is unavailable, explain why.
Data in the cache is such that the least significant byte corresponds to the lowest
address in the block (Little Endianness).
Index
Valid bit
Dirty bit
Physical Page number
0x0
0x52
0x480
0xABC
0x1234
0x26DE
0x10000
0xFFFFF
0
1
1
0
1
1
1
0
0
1
0
0
1
1
0
0
0x08654
0x12040
0x12084
0x12345
0x08765
0x481C0
0x10090
0x11111
Table 1 – Page Table (some entries)
Table 2 – 2-way set associative Data Cache (last row is set 000 and first row is set 111)
1 0x124802 (01)2
1 0x4804 (10)2
0x81623800045600
0x16BC6791010DE0
1 0x19000B (10)2
0x6540032100ABC
1 0x120844 (10)2
1 0x132084 (10)2
1 0x19000A (11)2
0x0016023810148A00
0x04560890A06B458
0xDEF00012345600
1 0x132084 (10)2
1 0x481C04 (00)2
0x8013650808040608
0x4567890A16145811 1 0x26DE4 (00)2
0x816238ABC45600D