everything on pdf

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CSE/EEE 230 – Assignment 9
Important: This is an individual assignment. Please do not collaborate.
Make sure to follow the academic integrity policies. Using work done by someone else will be
considered a violation of the academic integrity and will result in a report to the Dean’s office.
Your work should not match with anything found online.
Copying any part of this assignment, and providing them to another person or posting them on
the Internet without a permission of the instructor will be a violation of its copyright.
http://www.asu.edu/copyright/
No late submissions will be accepted.
Show all the steps to receive full credit.
There are 2 questions. The score will be scaled down to a total of 3 points.
Make sure to segment your document for the 2 questions.
Read the instructions clearly and show all required steps/explanation for full credit.
Assignment Instructions:
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Notation: For example, if a block of cache contains memory from address 0xAD to 0xAF,
write the data as: M[0xAD] – M[0xAF] or M[0xAD – 0xAF] or M[0xAF : 0xAD] or M[0xAF] :
M[0xAD].
For all questions, the addresses are 32-bit addresses.
Show the cache and the contents (data in cache) including all block added or removed
from the cache. You can show the final cache along with the replacements.
Start with an empty cache.
Show the table with Memory Address Accessed, Hit/Miss, Set/Index, Tag.
Question 1: Cache entries – Given the following information about a cache and the addresses
accessed/referenced, what is the Hit rate of the instruction cache? (15 points)
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Direct Mapped Instruction Cache.
Cache contains 4 blocks, with each block of size 4 words.
Program instructions are in Memory starting from address 0x40028.
The last instruction in the program is at address 0x40070.
The program contains a loop starting from 0x4003C to 0x4006C, which runs 3 times.
Question 2: Cache entries – Given the following information about a cache and the addresses
accessed/referenced, what is the Hit rate of the Data cache? (15 points)
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2-way Set Associative Data Cache.
Least Recently Used Cache Replacement Policy.
Cache contains 8 blocks, with each block of size 2 words.
Array A with 6 integer elements starts from 0x1234C8
Array B with 6 integer elements starts from 0x4231FC.
Array C with 6 integer elements starts from 0xDCBA98.
Program accessing these 3 arrays performs the task C[i] = A[n-i] + B[i]. n = 5, i = 0 to 5.
In the program, for every iteration (i = 0 to 5) the CPU reads array A element first, then
reads array B element and then writes to array C element.
Following MIPS code shows the above program details:
Start:
li $s0, 0x1234C8
li $s1, 0x4231FC
li $s2, 0xDCBA98
addi $s3, $0, 5
addi $t0, $0, 0
# Base address of array A
# Base address of array B
# Base address of array C
# Num elements, n+1 = 6
# Loop variable i = 0
Loop:
bgt $t0, $s3, Exit
sub $t1, $s3, $t0
# Loop runs from 0 to n(=5)
# Index for array B
# Addresses for array elements A[n-i]($s4), B[i]($s5),
C[i]($s6)
sll $t2, $t0, 2
sll $t3, $t1, 2
add $s4, $t3, $s0
add $s5, $t2, $s1
add $s6, $t2, $s2
lw $t4, 0($s4)
lw $t5, 0($s5)
add $t6, $t4, $t5
sw $t6, 0($s6)
Exit:
addi $t0, $t0, 1
j Loop
addi $t0, $0, 0
# Load A[n-i]
# Load B[i]
# A[n-i] + B[i]
# Store above sum in C[i]
# Update Loop Variable
# Reset Loop variable i